This page is a "brief" summary of some of the huge number of improvements in GCC 15. You may also want to check out our Porting to GCC 15 page
Note: GCC 15 has not been released yet, so this document is a work-in-progress.
unified_shared_memory
clause to the requires directive. For details,
see the offload-target specifics section in the
GNU Offloading and Multi Processing Runtime Library Manual.
GCC added ompx_gnu_pinned_mem_alloc as predefined
allocator. On Nvidia
GPUs, writing to the terminal from OpenMP target regions (but not from
OpenACC compute regions) is now also supported in Fortran; in C/C++ and
on AMD GPUs this was already supported before with both OpenMP and OpenACC.
Constructors and destructors on the device side for declare target
static aggregates are now handled.
unroll and tile
loop-transformation constructs are now supported.
get_device_from_uid and
omp_get_uid_from_device API routines have been added.
musttail statement attribute was added to enforce tail calls.constexpr generated strings,
analoguous to static_assert.this->non_existent, is now proactively diagnosed
when parsing a template.
views::concat.visit.std::format args.selected_logical_kind intrinsic function
and, in the ISO_FORTRAN_ENV module, the named constants
logical{8,16,32,64} and real16 were added.unsigned integers, enabled by
-funsigned; see gfortran documentation for details. These have been proposed
(J3/24-116)
for inclusion in the next Fortran standard.signal and interrupt
function attributes
that allow to specify the interrupt vector number as an argument.
It allows to use static functions as interrupt handlers, and also
functions defined in a C++ namespace.noblock function attribute.
It can be specified together with the signal attribute to
indicate that the interrupt service routine should start with a
SEI instruction to globally re-enable interrupts.
The difference to the interrupt attribute is that the
noblock attribute just acts like a flag and does not
impose a specific function name.__builtin_avr_mask1
built-in function. It can be used to compute some bit masks when
code like 1 << offset is not fast enough.-mavx10.2 or
-mavx10.2-256 compiler switch with 256-bit vector size
support. 512-bit vector size support for AVX10.2 intrinsics are
available via the -mavx10.2-512 compiler switch.
-march=knl,
-march=knm,-mavx5124fmaps,
-mavx5124vnniw, -mavx512er,
-mavx512pf, -mprefetchwt1,
-mtune=knl or -mtune=knm compiler switches.
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These pages are maintained by the GCC team. Last modified 2024-09-21.